Three-level rectifiers are rectifiers that have three DC outputs. In addition to the positive and negative DC outputs, they have a neutral DC output. Examples of three-level rectifiers are given in J. W. Kolar and F. C. Zach, “A Novel Three-Phase Utility Interface Minimizing Line Current Harmonics of High-Power Telecommunications Rectifier Modules”, IEEE Transactions on Industrial Electronics, Vol. 44, No. 4, August 1997, and in Y. Zhao, Y. Li and T. A. Lipo, “Force Commutated Three Level Boost Type Rectifier”, IEEE Transactions on Industry Applications, Vol. 31, No. 1, January/February 1995.
FIG. 1 shows an example of a switching branch for a three-level rectifier which includes six diodes D1 to D6 and two controllable switches S1, S2. The switches are controlled via a control arrangement 10 according to a particular modulation scheme. Possible modulation methods are vector modulation and hysteresis modulation, for example. When current flows towards the rectifier from an AC input pole of the rectifier branch, the first switch S1 is modulated, and the first diode D1 and the first switch S1 commutate with each other according to the modulation scheme used. In a corresponding manner, when the current flows away from the rectifier, the second switch S2 is modulated, and the fourth diode D4 and the second switch S2 commutate with each other according to the modulation scheme used. A rectifier configuration may also include an AC filter, which may be, for example, of L-type or LCL-type and which is connected between the rectifier input pole(s) and corresponding poles of the supplying AC voltage source.
However, in the above-described example, there is an uneven distribution of voltage across components in a reverse blocking state. A reason for this may be impedance differences due to different component characteristics, component manufacturing or circuit configuration. In the example of FIG. 1, when the third and fourth diodes D3 and D4 are in the reverse blocking state and if a reverse impedance of the fourth diode D4 is higher than the reverse impedance of the third diode D3, the voltage across the fourth diode D4 tends to be higher than the voltage across the third diode D3. However, the sixth diode D6 connected in parallel with the second switch S2 guarantees that the voltage across the fourth diode D4 is at most the same as the potential of the neutral DC output NP because the sixth diode D6 then connects the connection point of the third and fourth diodes D3 and D4 directly to the neutral DC output NP. On the other hand, if the reverse impedance of the third diode D3 is higher than the reverse impedance of the fourth diode D4 and the voltage across the third diode D3 tends to be higher than the voltage across the fourth diode D4, the sixth diode D6 stays in a reverse blocking state and does not limit the voltage across the third diode D3. Therefore, in the worst case, the third diode D3 may be exposed to the total voltage Udc of the DC intermediate circuit. In a similar manner, when the first and second diodes D1 and D2 are in the reverse blocking state, the second diode D2 may be exposed to the total voltage Udc of the DC intermediate circuit. This is not desirable.
A solution to the problem described above is to connect additional resistors in parallel with the series-connected diodes D1 to D4 to balance the distribution of voltage across the diodes. However, such additional components cause additional costs and also additional losses.